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Data Sheet
ADM1168
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To set up a 2-byte EEPROM address for a subsequent read,
write, block read, block write, or page erase. In this case, the
command byte is the high byte of EEPROM Address 0xF8
Unlike some EEPROM devices that limit block writes to within
a page boundary, there is no limitation on the start address when
performing a block write to EEPROM, except when
to EEPROM Address 0xFB. The only data byte is the low
byte of the EEPROM address, as shown in Figure 31.
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There must be at least N locations from the start address to
the highest EEPROM address (0xFBFF) to avoid writing to
S ADDRESS W A
1 2 3
SLAVE
4
EEPROM
ADDRESS
HIGH BYTE
(0xF8 TO 0xFB)
5
A
6
EEPROM
ADDRESS
LOW BYTE
(0x00 TO 0xFF)
7 8
A P
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invalid addresses.
An address crosses a page boundary. In this case, both
pages must be erased before programming.
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Figure 31. Setting an EEPROM Address
Because a page consists of 32 bytes, only the three MSBs of
the address low byte are important for page erasure. The
lower five bits of the EEPROM address low byte specify the
addresses within a page and are ignored during an erase
operation.
To write a single byte of data to the EEPROM. In this case, the
command byte is the high byte of EEPROM Address 0xF8
to EEPROM Address 0xFB. The first data byte is the low
byte of the EEPROM address, and the second data byte is
the actual data, as shown in Figure 32.
Note that the ADM1168 features a clock extend function for
writes to the EEPROM. Programming an EEPROM byte takes
approximately 250 μs, which limits the SMBus clock for repeated
or block write operations. The ADM1168 pulls SCL low and
extends the clock pulse when it cannot accept any more data.
READ OPERATIONS
The ADM1168 uses the following SMBus read protocols.
Receive Byte
In a receive byte operation, the master device receives a single
byte from a slave device, as follows:
1
S
2
SLAVE
ADDRESS
3
W A
4
EEPROM
ADDRESS
HIGH BYTE
(0xF8 TO 0xFB)
5
A
6
EEPROM
ADDRESS
LOW BYTE
(0x00 TO 0xFF)
7 8 9 10
A DATA A P
1.
2.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
read bit (high).
A
S
R
A
DATA
P
Figure 32. Single Byte Write to the EEPROM
Block Write
In a block write operation, the master device writes a block of
data to a slave device, as shown in Figure 34. The start address
for a block write must have been set previously. In the ADM1168,
a send byte operation sets a RAM address, and a write byte/word
operation sets an EEPROM address as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by
the write bit (low).
3. The addressed slave device asserts ACK on SDA.
3. The addressed slave device asserts ACK on SDA.
4. The master receives a data byte.
5. The master asserts NACK on SDA.
6. The master asserts a stop condition on SDA, and the
transaction ends.
In the ADM1168, the receive byte protocol is used to read a
single byte of data from a RAM or EEPROM location whose
address has previously been set by a send byte or write byte/
word operation, as shown in Figure 33.
1 2 3 4 5 6
SLAVE
ADDRESS
4.
5.
6.
7.
8.
9.
The master sends a command code that tells the slave
device to expect a block write. The ADM1168 command
code for a block write is 0xFC (1111 1100).
The slave asserts ACK on SDA.
The master sends a data byte that tells the slave device how
many data bytes are being sent. The SMBus specification
allows a maximum of 32 data bytes in a block write.
The slave asserts ACK on SDA.
The master sends N data bytes.
The slave asserts ACK on SDA after each data byte.
Figure 33. Single Byte Read from the EEPROM or RAM
10. The master asserts a stop condition on SDA to end the
transaction.
1
2
3
4
5
6
7
8
9
10
S ADDRESS W A COMMAND 0xFC A COUNT A
SLAVE BYTE
(BLOCK WRITE)
DATA
1
A
DATA
2
A
DATA
N
A P
Figure 34. Block Write to the EEPROM or RAM
Rev. A | Page 25 of 28
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